Standard Delay Format (SDF) is an IEEE standard for the representation and
interpretation of timing data for use at any stage of an electronic design
process. It finds wide applicability in design flows, and forms an efficient
bridge between
Dynamic timing verification and
Static timing analysis.
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It is an ASCII format that is represented in a tool and language independent
way and includes path delays, timing constraint values, interconnect delays
and high level technology parameters.
It has usually two sections: one for interconnect delays and the other for
cell delays.
SDF format can be used for back-annotation as well as forward-annotation.